Semiconductor memory devices can be classified into volatile memory devices and nonvolatile memory devices based on whether data stored therein is retained after power is removed from the device. The nonvolatile memory device can include an Electrically Erasable and Programmable Read Only Memory (EEPROM).
The EEPROM may operate in a program mode to write data to a memory cell, a read mode to read out the data stored in the memory cell and an erase mode to initialize a memory cell by erasing the stored data. In general, according to the Incremental Step Pulse Program (ISPP) scheme, the verify operation and reprogram operation after the verify operation can be repeated until the verification is completed.
Programming of an Multi-Level Cell (MLC) provides for the storage of 2 (or more) bits of data in one memory cell. If N bits are stored in one MLC, the threshold voltage distribution of each MLC can be subdivided into 2N where each threshold voltage distribution expresses N bit data. For example, when 2 bits of data are stored in one memory cell, the threshold voltage distribution of the memory cell is subdivided into four levels. When a bit value ‘0’ is written in the MLC represents program allow and a bit value ‘1’ represents program inhibit, the states of the MLC having four threshold voltages may be represented as ‘11’, ‘10’, ‘01’ and ‘00’ according to the descending order of the threshold voltage. In this case, ‘11’ represents the state of the MLC which remains erased without being programmed.
At this time, a floating gate coupling may be applied to adjacent word lines while performing each step, so distribution distortion may occur. If the distribution distortion becomes severe, the program may fail, causing a read error.